Sunday, June 20, 2010

Recent "more Moore" announcements

If we follow the naming convention of "more Moore" for those initiatives which push transistor scaling deeper into the nanometer regime, the last couple of weeks had some interesting new developments. In no particular order:
  • Toshiba shows its efforts for using nantotubes as transistor channels to achieve 16nm transistors.
  • Intel shows its use of "air gaps" (actually vacuum gaps) for metal insulation in 22nm technology.
  • Macronix announces its 3-D NAND flash (also at EETimes). For those with IEEEXplore access, one of the papers describing the technology during its development, from IEDM 2005, can be found here, showing that developments in this area take several years to reach the production stage. The abstract reads: "A bandgap engineered SONOS with greatly improved reliability properties is proposed. This concept is demonstrated by a multilayer structure of O1/N1/O2/N2/O3, where the ultra-thin "O1/N1/O2" serves as a non-trapping tunneling dielectric, N2 the high-trapping-rate charge storage layer, and O3 the blocking oxide. The ultra-thin "O1/N1/O2" provides a "modulated tunneling barrier" - it suppresses direct tunneling at low electric field during retention, while it allows efficient hole tunneling erase at high electric field due to the band offset. Therefore, this BE-SONOS offers fast hole tunneling erase, while it is immune to the retention problem of the conventional SONOS. With a N+-poly gate, we achieve self-convergent erased Vt ~3 V, suitable for NOR flash application. On the other hand, by using a P+-poly gate, a depletion mode device (Vt <> 6 V) is achieved, ideal for MLC-NAND application. Excellent performance and reliability for both applications are demonstrated. Furthermore, with this simple structure and no new materials BE-SONOS is readily manufacturable."

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