Wednesday, June 16, 2010


It seems that the big boys are putting their weight on this topic, and Xilinx and Actel are looking at 3D-stacked FPGAs, as this article points out.

Incidentally, this line almost at the end of the article made me wonder:
[...] Under the covers, there are two technical ways to make this all possible, according to an ARM insider. “The first is for TSVs at similar pitch to solder bumps (about 50nm)". [...]

Oh wait, do you mean it was a typo?

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