Wednesday, April 14, 2010

Phase noise analysis in a sampled PLL

The Planet Analog Newsletter, useful as it is, only links to the second installment of the series. Here are the three articles so far: From Microwaves and RF: Analyze phase noise in a sampled PLL part 1, part 2 and part 3.

From the opening of the first part:
Phase locked loops (PLLs) have been used for years to stabilize signal sources such as oscillators. In the past, loop bandwidths tended to be small compared to the sampling frequency, but with modern communications systems, requirements for faster switching times mean that this is no longer the case. Narrow-bandwidth PLLs can be effectively modeled and simulated by means of linear analysis, but these same approaches fall short for wide-bandwidth-sampled PLLs. In a sampled PLL, when the sampling frequency is large compared to the loop bandwidth, a linear simulation provides a fairly close approximation of the PLL’s behavior. But when the loop bandwidth is a considerable percentage of the sampling frequency, as in fast-switching frequency synthesizers, linear analysis may not provide accurate predictions. This opening installment of a three-part article will explore a nonlinear approach to the analysis of the effects of sampling on PLL performance.

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